{"id":22,"date":"2020-10-21T08:19:38","date_gmt":"2020-10-21T08:19:38","guid":{"rendered":"https:\/\/asyncsymposium.org\/async2021\/?page_id=22"},"modified":"2021-09-24T20:16:25","modified_gmt":"2021-09-24T20:16:25","slug":"program","status":"publish","type":"page","link":"https:\/\/asyncsymposium.org\/async2021\/program\/","title":{"rendered":"Program"},"content":{"rendered":"<div>\n<table style=\"width: 615px;height: 435px\">\n<colgroup>\n<col style=\"width: 15%\" span=\"1\" \/>\n<col style=\"width: 70%\" span=\"1\" \/><\/colgroup>\n<tbody>\n<tr>\n<td><b>Start Time<br \/>\n(PDT\/CET\/CST\/JST)<\/b><\/td>\n<td><b>Tuesday, Sept. 7th<br \/>\n<\/b><b>Session #1 Circuits and Methodology<\/b><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">7:00\/16:00\/22:00\/23:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">Keynote #1 &#8211; AR\/VR silicon challenges and research directions \u2013 what opportunities for asynchronous design?<\/span><span style=\"font-weight: 400\"><br \/>\n<\/span><em><span style=\"font-weight: 400\">Edith Beigne<\/span><\/em><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:00\/17:00\/23:00\/0:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">Break<br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:15\/17:15\/23:15\/0:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">Fluid: An Asynchronous High-level Synthesis Tool for Complex Program Structures<br \/>\n<i>Rui Li, Lincoln Berkley, Yihang Yang and Rajit Manohar<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:45\/17:45\/23:45\/0:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">Hierarchical Token Rings for Address-Event Encoding<br \/>\n<i>Prafull Purohit and Rajit Manohar<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:15\/18:15\/0:15\/1:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">Towards Hazard-Free Multiplexer Based Implementation of<br \/>\n<\/span><span style=\"font-weight: 400\">Self-Timed Circuits<br \/>\n<i>Alexander Kushnerov, Moti Medina and Alex Yakovlev<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:45\/18:45\/0:45\/1:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">Towards Explaining the Fault Sensitivity of Different QDI Pipeline Styles<br \/>\n<i>Patrick Behal, Florian Huemer, Robert Najvirt, Zaheer Tabassam and Andreas Steininger<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n<table style=\"width: 617px;height: 446px\">\n<colgroup>\n<col style=\"width: 15%\" span=\"1\" \/> <\/colgroup>\n<colgroup>\n<col style=\"width: 70%\" span=\"1\" \/><\/colgroup>\n<tbody>\n<tr>\n<td><b>Start Time<br \/>\n(PDT\/CET\/CST\/JST)<\/b><\/td>\n<td><b>Wednesday, Sept. 8th<br \/>\n<\/b><b>Session #2 Applications<\/b><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">7:00\/16:00\/22:00\/23:00<\/span><\/td>\n<td>Keynote #2 &#8211; The Future of Artificial Intelligence:\u00a0A 3D Silicon Brain<br \/>\n<em><span style=\"font-weight: 400\">Kwabena Boahen<\/span><\/em><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:00\/17:00\/23:00\/0:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">Break<br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:15\/17:15\/23:15\/0:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">A 28nm Configurable Asynchronous SNN Accelerator with<br \/>\nEnergy-Efficient Learning<br \/>\n<i>Jilin Zhang, Mingxuan Liang, Jinsong Wei and Hong Chen<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:45\/17:45\/23:45\/0:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">Self-timed Reinforcement Learning using Tsetlin Machine<br \/>\n<i>Adrian Wheeldon, Alex Yakovlev and Rishad Shafik<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:15\/18:15\/0:15\/1:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">Reconfigurable ASIC Implementation of Asynchronous Recurrent Neural Networks<br \/>\n<i>Spencer Nelson, Sangyun Kim, Jia Di, Zhe Zhou, Zhihang Yuan and Guangyu Sun <\/i><\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:45\/18:45\/0:45\/1:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">An asynchronous hybrid pixel image sensor<br \/>\n<i>Mohamed Akrarai, Nils Margotat, Laurent Fesquet and Gilles Sicard<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<table style=\"width: 619px;height: 450px\">\n<colgroup>\n<col style=\"width: 15%\" span=\"1\" \/>\n<col style=\"width: 70%\" span=\"1\" \/><\/colgroup>\n<tbody>\n<tr>\n<td><b>Start Time<br \/>\n(PDT\/CET\/CST\/JST)<\/b><\/td>\n<td><b>Thursday, Sept. 9th<br \/>\n<\/b><b>Session #3 Industry\/Fresh Ideas<\/b><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">7:00\/16:00\/22:00\/23:00<\/span><\/td>\n<td>Keynote #3 &#8211; Asynchronous Design for Space Applications<br \/>\n<em><span style=\"font-weight: 400\">Ran Ginosar<\/span><\/em><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:00\/17:00\/23:00\/0:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">Break<br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:15\/17:15\/23:15\/0:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">Asynchronous Serial Infrastructure using FPIO<br \/>\n<i>Andrew Lines<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:45\/17:45\/23:45\/0:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">Novel Circuit Structure of Basic Standard Cells against Glitches<br \/>\n<i>Masashi Imai<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:15\/18:15\/0:15\/1:15<\/span><\/td>\n<td><span style=\"font-weight: 400\">Addressing Multi-bit Transient Faults in Asynchronous RH-Click Controllers<br \/>\n<i>Felipe Kuentzer and Milos Krstic<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">9:45\/18:45\/0:45\/1:45<\/span><\/td>\n<td><span style=\"font-weight: 400\">A Novel Continuous TDC Measurement Technique<br \/>\n<i>Alexis Rodrigo Iga Jadue, Sylvain Engels and Laurent Fesquet<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<table style=\"width: 619px;height: 438px\">\n<colgroup>\n<col style=\"width: 15%\" span=\"1\" \/> <\/colgroup>\n<colgroup>\n<col style=\"width: 70%\" span=\"1\" \/><\/colgroup>\n<tbody>\n<tr>\n<td><b>Start Time<br \/>\n(PDT\/CET\/CST\/JST)<\/b><\/td>\n<td><b>Friday, Sept. 10th<\/b><b><br \/>\n<\/b><b>20\/21 Best Paper Awards<\/b><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">7:00\/16:00\/22:00\/23:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">2020 BPN#1<\/span><span style=\"font-weight: 400\"><br \/>\n<\/span><span style=\"font-weight: 400\">Cyclone: A Static Timing and Power Engine for Asynchronous Circuits<br \/>\n<em>Wenmian Hua, Yi-Shan Lu, Keshav Pingali,\u00a0<\/em><em>Rajit Manohar<\/em><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">7:30\/16:30\/22:30\/23:30<\/span><\/td>\n<td><span style=\"font-weight: 400\">2020 BPN#2<\/span><span style=\"font-weight: 400\"><br \/>\n<\/span><span style=\"font-weight: 400\">Optimization and Comparison of synchronizers<br \/>\n<i>Justin Reiher, Mark R. Greenstreet<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:00\/17:00\/23:00\/0:00<\/span><\/td>\n<td><span style=\"font-weight: 400\">2020 BPN#3<\/span><span style=\"font-weight: 400\"><br \/>\n<\/span><span style=\"font-weight: 400\">Formal Verification of Flow Equivalence in Desynchronized Designs<br \/>\n<i>Jennifer Paykin, Brian Huffman, Daniel M. Zimmerman, Peter A. Beerel<\/i><br \/>\n<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400\">8:30\/17:30\/23:30\/0:30<\/span><\/td>\n<td><span style=\"font-weight: 400\">2021 Best paper award<\/span><span style=\"font-weight: 400\"><br \/>\n<\/span><span style=\"font-weight: 400\">Closing Remarks<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Start Time (PDT\/CET\/CST\/JST) Tuesday, Sept. 7th Session #1 Circuits and Methodology 7:00\/16:00\/22:00\/23:00 Keynote #1 &#8211; AR\/VR silicon challenges and research directions \u2013 what opportunities for asynchronous design? Edith Beigne 8:00\/17:00\/23:00\/0:00 Break 8:15\/17:15\/23:15\/0:15 Fluid: An Asynchronous High-level Synthesis Tool for Complex Program Structures Rui Li, Lincoln Berkley, Yihang Yang and Rajit Manohar 8:45\/17:45\/23:45\/0:45 Hierarchical Token Rings &hellip; <a href=\"https:\/\/asyncsymposium.org\/async2021\/program\/\" class=\"more-link\">Continue reading <span class=\"screen-reader-text\">Program<\/span> <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"page-templates\/full-width.php","meta":{"footnotes":""},"_links":{"self":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/22"}],"collection":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/comments?post=22"}],"version-history":[{"count":32,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/22\/revisions"}],"predecessor-version":[{"id":149,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/22\/revisions\/149"}],"wp:attachment":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/media?parent=22"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}