{"id":140,"date":"2021-08-31T20:16:33","date_gmt":"2021-08-31T20:16:33","guid":{"rendered":"https:\/\/asyncsymposium.org\/async2021\/?page_id=140"},"modified":"2021-08-31T20:18:03","modified_gmt":"2021-08-31T20:18:03","slug":"keynote-speakers","status":"publish","type":"page","link":"https:\/\/asyncsymposium.org\/async2021\/keynote-speakers\/","title":{"rendered":"Keynote Speakers"},"content":{"rendered":"
Edith Beigne, Facebook<\/span><\/span><\/strong><\/em><\/h5>\n

Title \u2013\u00a0<\/strong>AR\/VR silicon challenges and research directions \u2013 what opportunities for asynchronous design?<\/p>\n

Abstract \u2013\u00a0\u00a0<\/strong>Augmented reality (AR) is a set of technologies that will fundamentally change the way we interact with our environment. It represents a merging of the physical and the digital worlds into a rich, context aware and accessible user interface delivered through a socially acceptable form factor such as eyeglasses. One of the biggest challenges in realizing a comprehensive AR experience are the performance and form factor requiring new custom silicon. Innovations are mandatory to manage power consumption constraints and ensure both adequate battery life and a physically comfortable thermal envelope. This presentation reviews Augmented Reality applications at Facebook Reality Labs and Silicon challenges. We will discuss current and future Research directions and comment about some potential opportunities for asynchronous design.<\/p>\n

Bio \u2013\u00a0\u00a0<\/strong>Edith Beign\u00e9 is the Research Director of AR\/VR Silicon at Facebook Reality Labs where she leads research projects driving the future of AR devices. Her main\u00a0research\u00a0interests are low power digital and mixed-signal circuits and design with emerging technologies. Over the past 20 years, she has been focusing her research on low power and adaptive circuit techniques, exploiting new design techniques and advanced technology nodes for different applications ranging from high performance multi-processors to ultra-low power SoC, and, more recently, AR\/VR applications.\u00a0She is the chair of ISSCC 2022\u00a0and part of ISSCC TPC since 2014,\u00a0she\u00a0was part of VLSI symposium TPC between 2015 and 2020. Distinguished Lecturer for the SSCS\u00a0in\u00a02016\/2017, Women-in-Circuits Committee chair and JSSC Associate Editor since 2018. She visited Stanford University\u00a0in\u00a02018 to research on emerging technologies and new architectures.<\/p>\n

Kwabena Boahen, Stanford University<\/strong><\/em><\/h5>\n

Title<\/strong>\u00a0\u2013\u00a0The Future of Artificial Intelligence:\u00a0<\/strong>A 3D Silicon Brain<\/strong><\/p>\n

Abstract<\/strong>\u00a0\u2013 Artificial intelligence benefited from shrinking transistors and connecting them densely in two dimensions to reduce the energy cost of calculating. Now the energy cost of signaling greatly exceeds that of calculating, reducing the benefits of additional miniaturization. Signaling distance is now being shortened by stacking circuits, but stacking reduces surface area for dissipating heat, forcing a 3D processor to operate serially, rather than in parallel. A fundamental solution would exchange binary numbers, whereby each signal from a pair of units encodes one bit, for\u00a0n<\/em>-ary numbers, whereby each signal from an entire layer of, say, 1,024 units encodes 10 bits. These sparser and richer signals would require exchanging Boolean logic for operators inseparable in time and space. Advances in cortical physiology suggest that this inseparability could be achieved with dendrite-like detectors that weight an input based on when it occurs\u00a0and<\/em>\u00a0where it is received. This could allow a silicon brain to scale like a biological brain in energy and heat\u2013\u2013linearly with the number of neurons\u2013\u2013and thus be thermally viable in 3D.<\/p>\n

Bio<\/strong>\u00a0\u2013\u00a0Kwabena Boahen\u00a0received the B.S. and M.S.E. degrees in electrical and computer engineering from the Johns Hopkins University, Baltimore, MD, both in 1989, and the Ph.D. degree in computation and neural systems from the California Institute of Technology, Pasadena, in 1997. He was on the bioengineering faculty of the University of Pennsylvania from 1997 to 2005, where he held the first Skirkanich Term Junior Chair. He is presently Professor of\u00a0Bioengineering and Electrical\u00a0Engineering at Stanford University, with a courtesy appointment in Computer Science. He is also an investigator in Stanford\u2019s Bio-X Institute and Wu Tsai Neurosciences Institute. He founded\u00a0and directs Stanford\u2019s\u00a0Brains in Silicon<\/em>\u00a0lab, which develops silicon integrated circuits that emulate the way neurons compute and computational models that link\u00a0neuronal\u00a0biophysics to cognitive behavior. This interdisciplinary research bridges neurobiology and medicine with electronics and computer science, bringing together these seemingly disparate fields.\u00a0His scholarship is widely recognized, with over a hundred publications, including a cover story in Scientific American featuring his lab\u2019s work on a\u00a0silicon retina\u00a0and a silicon\u00a0tectum that \u201cwire together\u201d automatically\u00a0(May 2005). He has been invited to give over a hundred seminar, plenary, and keynote talks, including a 2007 TED talk,\u00a0\u201cA computer that works like the brain\u201d,\u00a0with over seven hundred thousand views. He has received several distinguished honors, including a\u00a0Packard Fellowship\u00a0<\/em>for Science and Engineering\u00a0<\/em>(1999) and a National Institutes of Health Director\u2019s\u00a0Pioneer Award<\/em>\u00a0(2006). He was elected a fellow of the American Institute\u00a0for\u00a0Medical and Biological Engineering (2016) and of the Institute of Electrical and Electronic Engineers (2016) in recognition of his lab\u2019s work on\u00a0Neurogrid<\/em>,\u00a0an\u00a0iPad-size platform that emulates the cerebral cortex\u00a0in\u00a0biophysical\u00a0<\/em>detail and at\u00a0functional\u00a0<\/em>scale, a combination that hitherto required a supercomputer. In his lab\u2019s most recent research effort, the\u00a0Brainstorm Project,\u00a0<\/em>he\u00a0<\/em>led a multi-university, multi-investigator team to co-design hardware and software\u00a0that\u00a0makes neuromorphic\u00a0computing easier to apply.\u00a0A spin-out from his Stanford lab,\u00a0Femtosense Inc\u00a0<\/em>(2018), is commercializing this breakthrough.<\/p>\n

Ran Ginosar, Technion & Ramon Space<\/strong><\/em><\/h5>\n

Title\u00a0\u2013\u00a0Asynchronous Design for Space Applications<\/strong><\/p>\n

Abstract<\/strong>\u00a0\u2013 Computing in Space is challenged by cosmic and solar radiation, by harsh conditions, and by the requirement for very long operational lifetime without maintenance. Some of these hardships are best addressed by asynchronous logic. I will describe the Space supercomputers made by Ramon.Space and discuss applications of various concepts that I have learned over the years from my ASYNC colleagues.<\/p>\n

Bio<\/strong>\u00a0\u2013 Ran Ginosar received BSc EE&CS (scl<\/i>) from the Technion in 1978 and PhD from Princeton University in 1982. He served on the Technion EE & CS faculty since 1983. Ran has visited U of Utah in 1989-1990 and Intel Research in Oregon 1997-1999. He has co-founded several companies in the area of VLSI architecture. Ran is interested in computer architecture, in synchronization and in asynchronous logic research. Ran is the co-recipient of the 1998 ASYNC conference Best Paper Award.<\/p>\n","protected":false},"excerpt":{"rendered":"

Edith Beigne, Facebook Title \u2013\u00a0AR\/VR silicon challenges and research directions \u2013 what opportunities for asynchronous design? Abstract \u2013\u00a0\u00a0Augmented reality (AR) is a set of technologies that will fundamentally change the way we interact with our environment. It represents a merging of the physical and the digital worlds into a rich, context aware and accessible user … Continue reading Keynote Speakers<\/span> →<\/span><\/a><\/p>\n","protected":false},"author":8,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"_links":{"self":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/140"}],"collection":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/users\/8"}],"replies":[{"embeddable":true,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/comments?post=140"}],"version-history":[{"count":1,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/140\/revisions"}],"predecessor-version":[{"id":141,"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/pages\/140\/revisions\/141"}],"wp:attachment":[{"href":"https:\/\/asyncsymposium.org\/async2021\/wp-json\/wp\/v2\/media?parent=140"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}